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IEC 60191-6 Ed. 2.0 Edition 09/2004
Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages
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  • 236.5 / copy
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Abstract

Gives general rules for the preparation of outlines drawings of surface-mounted semiconductor devices. It supplements IEC 60191-1 and 60191-3. It covers all surface-mounted discrete semiconductors devices as well as integrated circuits classified as form E.

Status

Standard - Superseded

Origin

Technical Committee :
47D : Semiconductor devices packaging

Implementation

start of the vote on the project      date of ratification (dor)   
end of the vote on the project      date of anouncement (doa)   
start of the vote on the final project      date of publication (dop)   
end of the vote on the final project      date of withdrawal (dow)   


Publication Official Journal
of the Grand-Duchy of Luxembourg
Reference

Relations

Evolutions
IEC 60951-3 Ed.3.0 RLV

Relations to older standards
IEC 60191-6 am1 Ed. 1.0

International Classification for Standards (ICS codes) :

31.080.01 : Semiconductor devices in general

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